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[SYCL] Fix device code instrumentation #4615
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Moving to draft - it is possible that defaulting the FE option to |
Instead of maintaining a (malfunctioning) driver option, unconditionally pass the CC1 option `-fsycl-instrument-device-code` for SPIR-V-based targets. Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
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Looks okay to me.
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
fe3becc
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
The addition of internal libraries cannot be affected by `-fno-sycl-device-lib` Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
Still TBD:
REMOVED: "Rework the parsing of the CLI option so that the non-SPIR-triple error is emitted both for compile and link phases" |
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
Instead of skipping the annotations during ESIMD-specific module processing, don't add the instrumentation to these GPU-specific kernels in the first place. Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
Add a couple tests with execute-only kernels to ensure that ITT annotations' generation doesn't break the compilation/execution. This aims to test intel/llvm#4615. Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
@premanandrao @elizabethandrews @AaronBallman Just FYI, there are no changes expected to Clang FE with this revision of the PR, so feel free to unsubscribe if the notifications are bugging you. |
Thanks for the note, but no worries. :-) |
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
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SPIRITTAnnotationsPass changes LGTM.
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LGTM
The Precommit checks have passed after being tuned to the latest revision of intel/llvm-test-suite#484, approvals for major changes have been gathered. @kbobrovs, could you please review the changes in |
* sycl: (108 commits) [SYCL][XPTI] Revisit resource management strategy (intel#4494) [SYCL][ESIMD] Fix misprint: ESIMD_L1_FLUASH_RO_DATA -> ESIMD_L1_FLUSH_RO_DATA (intel#4681) [SYCL] Make kernel_bundle interop more conformant (intel#4672) [SYCL] Submission with kernel parameter ignores set kernel bundle (intel#4667) [SYCL] Add support for std::byte to vec class (intel#4637) [BuildBot] Uplift CPU/FPGAEMU RT version for CI Process (intel#4671) [SYCL] Fix an error on host when big image is used on opencl:gpu (intel#4668) [SYCL] Exclude exported symbols from kernel bundles (intel#4660) Revert "[SYCL] Allow overriding plugin libraries (intel#4067)" (intel#4659) [SYCL] Handle exceptions on mutually exclusive handler operations (intel#4639) [sycl-post-link] Don't split module if function pointer has a user that's not CallInst (intel#4657) [SYCL][HIP] Fix MemBufferFill for nvidia platform (intel#4629) [SYCL][Doc] Describe DPC++ CUDA install w/ non-standard toolkit loc (intel#4663) [SYCL] Fix device code instrumentation (intel#4615) Remove myself as a code owner (intel#4653) [SYCL] Fix overwriting insert to sub_group_mask (intel#4656) [x86][Matrix] Replace packed_a with row_major in matrix testcases (intel#4641) [SYCL][Doc] Add device global extension spec (intel#4233) [sycl-post-link] Adds property listing exported functions (intel#4626) [Driver][SYCL] Do not consider non-archive files for FPGA binary checks (intel#4644) ...
* sycl: (107 commits) [SYCL][XPTI] Revisit resource management strategy (intel#4494) [SYCL][ESIMD] Fix misprint: ESIMD_L1_FLUASH_RO_DATA -> ESIMD_L1_FLUSH_RO_DATA (intel#4681) [SYCL] Make kernel_bundle interop more conformant (intel#4672) [SYCL] Submission with kernel parameter ignores set kernel bundle (intel#4667) [SYCL] Add support for std::byte to vec class (intel#4637) [BuildBot] Uplift CPU/FPGAEMU RT version for CI Process (intel#4671) [SYCL] Fix an error on host when big image is used on opencl:gpu (intel#4668) [SYCL] Exclude exported symbols from kernel bundles (intel#4660) Revert "[SYCL] Allow overriding plugin libraries (intel#4067)" (intel#4659) [SYCL] Handle exceptions on mutually exclusive handler operations (intel#4639) [sycl-post-link] Don't split module if function pointer has a user that's not CallInst (intel#4657) [SYCL][HIP] Fix MemBufferFill for nvidia platform (intel#4629) [SYCL][Doc] Describe DPC++ CUDA install w/ non-standard toolkit loc (intel#4663) [SYCL] Fix device code instrumentation (intel#4615) Remove myself as a code owner (intel#4653) [SYCL] Fix overwriting insert to sub_group_mask (intel#4656) [x86][Matrix] Replace packed_a with row_major in matrix testcases (intel#4641) [SYCL][Doc] Add device global extension spec (intel#4233) [sycl-post-link] Adds property listing exported functions (intel#4626) [Driver][SYCL] Do not consider non-archive files for FPGA binary checks (intel#4644) ...
-fsycl-instrument-device-code
to CC1for SPIR-V-based targets.
-fno-sycl-device-lib
effects.Tested in intel/llvm-test-suite#484.
Signed-off-by: Artem Gindinson artem.gindinson@intel.com